The present invention relates to testing integrated circuits (ICs).
Programmable logic devices (PLDs) (also sometimes referred to as complex PLDs (CPLDs), programmable array logic (PALs), programmable logic arrays (PLAs), field PLAs (FPLAs), erasable PLDs (EPLDs), electrically erasable PLDs (EEPLDs), logic cell arrays (LCAs), field programmable gate arrays (FPGAs), or by other names), are well-known ICs that provide the advantages of fixed ICs with the flexibility of custom ICs. Such devices typically provide an “off the shelf” device having at least a portion that can be programmed to meet a user's specific needs. Application specific integrated circuits (ASICs) have traditionally been fixed ICs. However, it is possible to provide an ASIC that has a portion or portions that are programmable. Thus, it is possible for an IC device to have qualities of both an ASIC and a PLD. The term PLD as used herein will be considered broad enough to include such devices.
FIG. 1 illustrates an overview of an IC 100 along with a configuration device 105 coupled to IC 100. IC 100 may be programmed with data stored in configuration device 105, which could be external to IC 100, as shown in FIG. 1, or internal to IC 100. IC 100 may, for example, be a PLD. IC 100 includes configurable elements 110, configuration controller 115 (which may include error detection), address registers 120 and data registers 125.
Configurable elements 110 may, for example, be configuration memories. Configuration elements that are field programmable are often implemented as random access memory (RAM) cells, which in PLDs are sometimes referred to a “configuration RAM” (CRAM)). CRAMs are generally implemented as static RAM (SRAM). Thus, CRAMs generally refer to SRAM. The CRAM is typically arranged in an array of columns and rows of memory cells. Some of the CRAM may be used to control routing on the PLD, and others to control various logic functions. Each cell of a routing CRAM is typically connected to the gate terminal of a corresponding pass gate, which normally acts as a switch connecting a data input terminal to a data output terminal. Thus, configuration elements 110 may include CRAMs that control pass transistors to form configurable routing switches.
Configuration controller 115 receives the data from configuration device 105, which may be a memory as shown, or other configuration device. Configuration controller 115 accesses configuration device 105 and may use its address and control signals and receives data from its data signals, and loads the data into the CRAM. This loading is commonly done by sequentially shifting a ‘1’ or ‘0’ through each bit position in address registers 120. During programming, the ‘1’ in an address register enables a particular column of CRAM for programming. Also, during programming, a ‘0’ in an address register indicates that the column below that address register is not selected for programming. For each column, data bits are loaded into data registers 125 and programmed into the selected column. Configuration controller 115 may also include the ability to read back data from the CRAM by selecting a column and loading the data into data registers 125, and transferring it into configuration controller 115. During reading, the ‘1’ in the address register indicates that data in the column corresponding to the address register are to be read. Also, during reading, the ‘0’ in the address register indicates that data in the column corresponding to the address register are not to be read. Configuration controller 115 may include the ability to perform error checking on the data that is read back, or to transmit the data off of IC 100.
As noted above, configuration elements 115 are generally implemented as CRAM. In some cases, however, resistive elements may be used to replace either the CRAM or the CRAM and pass gate, if the resistive element has a suitably low ON state resistance. Thus, the resistive elements may be used both as memories and as electrical switches. These resistive elements may be electrolytic switches, such as, for example, conductive bridge devices. However, the resistive elements are not limited to this example and may be any suitable resistive element that has a high impedance mode (where the resistive element essentially acts as a switch in an OFF state) and a low impedance mode (where the resistive element essentially acts as a switch in an ON state). As an example, a high impedance mode has a resistance on the order of 109 ohms (Ω), whereas a low resistance mode has a resistance on the order of 103 to 104Ω. A high OFF state resistance helps prevent leakage when the device is not being used to conduct current, and a low ON state resistance helps provide high speed in transmitting signals through the device.
As noted above, a number of these resistive elements (i.e., switches) may be used to replace the configurable routing switches in an IC. However there is a difficulty in testing ICs using these devices. For the purposes of explanation, a moderate sized IC might have 100×106 switches arranged in a 10,000 row by 10,000 column array. Columns are programmed sequentially, one at a time. While CRAM cells conventionally used in ICs switch in a few nanoseconds (nS), the electrolytic switches can require on the order of 100 microseconds (μS) to program. Thus, the time to program all columns sequentially is on the order of one second. Since thousands of test patterns are required to test an IC, test times on the order of an hour are possible, which is too expensive for production testing.
Embodiments of the present invention arise in this context.